Supporting the GDSII-based PHY is the RTL-based PHY Utility Block (PUB) that includes PHY control features such as read/write leveling, data eye training, per-bit data deskew control, PVT compensation ...
The chips are paired with Intel’s new Iris X graphics card and DDR5 or DDR4 memory. The new chips are the first to support Intel’s Movidius vision processing unit (VPU). The P- and U-series ...